篇名 | Implementation of Multilevel Thresholding Process Using Histogram Valley Estimation Method Based on FPGA |
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卷期 | 23:3 |
作者 | Deng-Yuan Huang 、 Ta-Wei Lin 、 Wu-Chih Hu |
頁次 | 001-015 |
關鍵字 | Otsu’s method 、 multilevel thresholding 、 image segmentation 、 filed programmable gate array 、 EI 、 MEDLINE 、 Scopus |
出刊日期 | 201210 |
An automatic multilevel thresholding algorithm called histogram-based valley estimation method
(HVEM) based on a field programmable gate array (FPGA) is presented for segmenting an image into multi-
ple homogeneous regions. The major contributions and benefits of this paper are as follows: (1) the proposed
method is computationally efficient because it eliminates the expensive computations due to repeated arith-
metic operations such as multiplications and divisions in Otsu’s method, making it much easier to implement
on an FPGA device; (2) the method is capable of automatically determining the number of clusters by esti-
mating possible valleys in the histogram of real world images; and (3) the accuracy of the method is compa-
rable to that of Otsu’s method in threshold determination, which is achieved by evaluating the mean structur-
al similarity (MSSIM) and uniformity. The synthesis results of the FPGA chip system indicate that the opera-
tion speed can reach up to 191.0 MHz, which is equivalent to the processing rate of 969 frame/s for gray lev-
el images of size 256 × 256. The performance meets the requirements for a real-time image processing sys-
tem.