利用矽穿孔的三維整合是一項新興的積體電路技術。此技術已經被廣泛地使用在記憶體上，尤其是在動態隨機存取記憶體晶粒的堆疊。然而，要使三維隨機存取記憶體能夠大量生產，良率依然是關鍵問題之一。在本文中，我們針對矽穿孔和微凸塊提出了點對點的內部連線架構的容錯介面，目的便是要增進三維隨機存取記憶體的製造良率。此架構的好處在於利用記憶體堆疊本身已存在的冗餘矽穿孔和微凸塊，來替代損壞的矽穿孔或微凸塊，而且相較於現今已提出的技術，又不需要在邏輯晶粒上使用額外的修復電路。另外，我們提出全域和區域的重新配置方法，這兩種方法適合在不同的三維隨機存取記憶體情況。分析結果顯示：我們提出的『通道內』可重組式的連線架構可以有效地提升三維隨機存取記憶體的良率，與先前提出的『通道間』可重組式的連線架構相比，良率最高可以提升23%，確實相當可觀。

Three-dimensional (3-D) integration using through-silicon via (TSV) is an emerging technology for integrated circuit (IC) design. It has been used in DRAM die stacking extensively. However, yield remains a key issue for volume production of 3-D RAMs. In this paper, we present a point-to-point interconnection structure derived from bus and propose a fault-tolerance interface scheme for TSVs and micro bumps to enhance their manufacturing yield in the 3-D RAMs. The interconnection structure is inherently redundant and thus can replace defective TSVs or micro bumps without using repair circuits. Global and local reconfiguration approaches are proposed which benefit distinct situations of the 3-D RAM. Analyses show that the proposed intra-channel reconfigurable interconnection scheme can improve the yield of the 3-D RAM effectively. Compared to the previous solution using an inter-channel reconfigurable interconnection scheme, the yield improvement can be as large as 23% which is very significant.