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篇名 台灣 IC 設計產業生產效率評估/三階段DEA 法之應用
卷期 10:3
並列篇名 THE EFFICIENCY OF INTEGRATED CIRCUIT DESIGN INDUSTRY IN TAIWAN AREA MEASURED BY THREE-STAGE DEA APPROACH
作者 許鎦響
頁次 439-463
關鍵字 IC 設計廠商生產效率資料包絡分析法Data Envelopmen AnalysisIntegrated Circuit Design CompaniesProduction Efficiency
出刊日期 200909

中文摘要

高科技產業經營環境瞬息萬變,台灣IC 產業的發展,在世界前100 大半導體公司的排名競爭力成為矚目的焦點。如何保持IC 產業既有的競爭優勢,並繼而能在目前全球不景氣中開創新局,生產效率仍然是此產業永續發展的動力及保證,促使研究者想探討臺灣IC 設計廠商生產效率之構思。
本文使用台灣經濟新報(TEJ)資料庫,完整蒐集2001-2006 年台灣地區75 家IC 設計廠商的縱橫資料(panel data),並採用Fried, Lovell, Schmidt and Yaisawarng (2002)所提出的三階段資料包絡分析法(Data Envelopment Analysis,DEA)來估計生產效率,以期能對台灣地區IC 設計廠商之生產效率進行更準確之評估。同時比較IC 設計廠商在調整外生環境變數及隨機干擾因素影響前後所估算之生產效率的差異。
實證分析結果如下:
一、 台灣地區75 家樣本IC 設計廠商2001-2006 年之平均生產效率值為0.9106,其無效率來源,來自於變動規模報酬之純技術無效率為0.0252(=1-0.9748),及來自規模無效率為0.0657(=1-0.9343)。第一階段DEA 所估算出之生產效率值,顯示變動規模報酬之純技術無效率是造成生產無效率的主要來源。
二、 因第一階段之無效率值為0.2768(1-0.7232)包含環境因素與隨機干擾二個部分,本文於第二階段,將L、K、M 及RD 等變數之投入差額(input slacks)做為應變數,設廠年齡、設廠年齡平方項、使用權利金及使用專利件數等外生環境變數做為自變數,進行調整。
三、 第一階段DEA 與第三階段DEA 所估算之75 家樣本IC 設計廠商的平均生產效率值分別為0.7232 及0.9106,實證結果顯示,環境因素及隨機干擾因素對於效率評估確有影響,且影響很大。

英文摘要

Hi-tech industries are highly competitive and are always changing. The development of Taiwan’s IC industry has received a lot of attention in terms of its competitive position among the top 100 semiconductor companies in the world. To remain competitive in the IC industry and keep developing given the worldwide poor economic conditions, Taiwan needs to keep improving its production efficiency. Thus, in this study the researcher attempts to explore the issue of production efficiency of Taiwan’s IC design industry.
This study used the database from Taiwan Economic Journal (TEJ) and obtained the panel data of 75 Taiwanese IC design companies between 2001 and 2006. The Three-stage DEA (Data Envelopment Analysis) approach by Fried et al. (2002) was also employed to estimate IC design companies’ production efficiency. The model takes into account the influences the exogenous variables and statistical interferences may have on the variables and hence should be able to provide a more accurate assessment of the production efficiency of the IC design companies examined in this study. The researcher also compared the differences in production efficiency before and after making the adjustment to the exogenous variables and statistical interferences.
The results of the empirical analyses are as follows:
1. The mean production efficiency of Taiwan’s 75 sampled IC design companies between 2001 and 2006 is 0.9106. The sources of production inefficiency include the pure technical inefficiency of variable return to scale (VRS) equal to 0.0252 (1-09748) and scale inefficiency equal to 0.0657 (1-0.9343). The DEA values from the first stage indicate that the pure technical inefficiency of variable return to scale (VRS) is the
major source of production inefficiency.
2. At the first stage, the inefficiency of 0.2768 (1-0.7232) contains the environmental effect and statistical noise. Thus, an adjustment has been made at the second stage, in which the dependent variables are the input slacks of L, K, M, and RD while the independent variables are exogeneous variables, the establishing age, the establishing age square, the premium, and the number of patents.
3. As the DEA values from the first stage and the third stage indicate, the mean production efficiency of Taiwan’s 75 sampled IC design companies is 0.7232 and 0.9106 respectively. Empirical analyses show exogenous variables and statistical interferences have significant impact on the assessment of efficiency.

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