篇名 | System Performance on Dual CAN-Bus Network for Avionics System Applications |
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卷期 | 40:3 |
作者 | Lin, Chin E. 、 Yen, Hung-ming |
頁次 | 183-188 |
關鍵字 | Dual bus system 、 Controller Area Network 、 Time Trigger Protocol 、 SATS 、 EI |
出刊日期 | 200809 |
This paper presents prototype fabrication and verification on two different configurations of dual CAN (Controller Area Network) bus system.
New circuit designs of bus selector and memory mapping technique are
discussed with promotion from single bus system. With successful implementations, these two circuit systems are compared with system tests.
The system CPU load using bus selector is much less than the memory
mapping by software under close reliability and stability performance.
Circuit board fabrication and test is verified and extended into PC
controlled operation. Each node will be connected to real instruments or
sensors, as well as several simulated signals. The dual bus IP board design is based on standard CAN communication stacks by firmware for different integration requirements. In system verification, a primary flight display suitable for small aircraft application for data exchange and control is constructed and tested.