Abstract: On-chip network is a promising solution for the on-chip communication problem of large-scale CMPs and a major factor in the performance, area, and power consumption of the overall system. This paper proposes an on-chip network with regular reconfigurable topology (RROCN). The RROCN is a reconfigurable and hybrid communication structure contained routed network with 2D mesh topology and shared bus. The reconfiguration is implemented by disabling and bypassing the unwanted nodes of routed network and then organizing them as shared buses. To achieve this goal, a constructive algorithm, reconfiguration scheme, and modified XY routing algorithm with self-adaptive feature are proposed. We evaluate the RROCNs with four reconfiguration topologies and compare them with a regular on-chip network. Our results show that, with 4x4 2D mesh reconfigurable topology, the RROCN requires 41.3% less power, provides 34.5% lower zero-load latency, but provides 34.6% lower maximum throughput compared with the regular on-chip network.