本論文旨在設計一車用線傳電子系統 FlexRay 通訊系統電子實體層之匯流 排收發器 (bus driver, BD)。首先，根據FlexRay 規格書[1, 2]設計數位狀態機的 電路，實現所必需的外部輸入／出訊號並規畫內部與各子電路方塊所設計的輸 入／出訊號。接著設計發射器電路，提供差動發射二位元資料流的能力。然後 設計接收器電路，除了要能接收二位元資料流之外，還要能濾除雜訊和辨別訊 號大小。最後進行收發器電路整合測試，測試結果驗證我們設計之匯流排收發 器功能之正確性。本設計使用台積電的0.35 微米2P4M CMOS 製程進行模擬 與電路實現，在10 MBit/s 的資料傳輸速率下，以+-1.2 V 的差動電壓在匯流排 上傳輸，匯流排等效電阻為45 Ω 時，負載消耗32 mW，而收發器功率消耗為 204 mW。

The major work of this paper is to design a Bus Driver for the physical layer of the FlexRay communication in an X-by-Wire vehicle electronic system. First, we design the digital state machine according to the FlexRay specifications [1, 2], and implement the external input/output signals and the internal signals that connect among each sub-circuit block. Second, we design a transmitter that can provide the capability of differentially transmitting binary data stream. Third, we design a receiver that not only can receive binary data stream, but also can filter noise and distinguish signal levels. Finally, we test the designed circuit. The testing results confirm the functionality of the designed Bus Driver. The design is based on a TSMC 0.35 m 2P4M mixed-signal CMOS process. For 10 MBit/s data rate, +-1.2 V transmitting voltages, and 45 Ω bus equivalent resistance, the load and the transceiver dissipate 32 mW and 204 mW power, respectively.