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篇名 系統層級功耗分析平台設計
卷期 165
並列篇名 The Design of System Level Power Analysis Platform
作者 黃迅倫王振傑賴俊宏陳耀華紀美伶陳昭宏林士哲林詠捷盧俊銘
頁次 016-024
關鍵字 電子系統層級事物層級建模功耗模型
出刊日期 201603

中文摘要

系統層級本文介紹一套能夠進行全系統(Full System)分析之系統層級功耗模擬平台,平台中整合了多 項目前在智慧行動裝置上使用的關鍵性IP模組,包含中央處理器(CPU)、繪圖處理器(GPU)、影像 編解碼器(CODEC)、影像處理器(ISP)、記憶體控制器(LPDDR3 Ctrl)、晶片匯流排(NoC)及液晶顯 示控制器(LCDC)等。這些模組的建置皆以C/SystemC程式語言撰寫,並支援事務層級模型標準介 面(TLM 2.0),各IP模組並整合了具工研院資通所自主專利之系統層級功耗模型介面,在此平台上 不僅可以快速地進行Android作業系統開機外, 更可以針對不同應用情境進行系統整體功耗剖 析,讓系統開發者在設計初期能夠快速地進行架構探索、系統效能功耗分析,並進行軟硬體協同 設計與優化等,幫助系統開發者能夠早期正確定義系統規格,並實現最佳化系統整體設計,強化 系統晶片性能並縮短開發時程。

英文摘要

In this paper we present the ITRI System-Level Power Analysis Platform, an electronic system level (ESL) virtual platform for evaluating smart mobile device architecture with real-world workloads. The virtual platform has integrated many ESL IP models of major components that are indispensable in mobile SoC design, including CPU, GPU, Video Encoder, Video Decoder, ISP, LPDDR3 controller, NoC and LCDC. The ESL IP models are designed based on C/SystemC programming language and are compatible with the standard TLM 2.0 interface with non-blocking, AT 4-phase protocol. The ESL IP models are also incorporated with ITRI-patented ESL power analysis interface. The platform can boot Android within minutes, which is hundred times faster than traditional simulation approach. Furthermore, the platform can support detailed IP-level power profiling based on different application scenarios, which provides very useful information for system designer to evaluate, explore, and optimize the system performance and power as earlier as possible.

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