隨著晶片趨向輕薄短小、低耗電、低成本與多功能的需求，故晶片在系統中可使用的空間愈來愈小，因此 發展三維玻璃穿孔導線 (through glass via, TGV) 技術可以有效提供晶片間在垂直方向之電訊連接，進而縮 短其傳輸距離，成為該領域中較為突出且重視的一項技術。本研究主要目的在探討玻璃穿孔製程，使用感 應耦合電漿離子蝕刻 (inductively coupled plasma-reactive ion etching, ICP-RIE) 系統，以八氟環丁烷 (C4F8) 與氦氣 (He) 混和氣體作為反應氣體，對石英玻璃進行穿孔結構製作，探討改變基板厚度、孔洞尺寸及蝕 刻遮罩對表面形貌、蝕刻率及側壁垂直度等影響。實驗結果發現以最佳參數製程可得到一最快蝕刻速率約 為 0.408 μm/min，蝕刻穿孔後深度可達 150 μm、穿孔直徑製程能力可達 50 μm 及側壁垂直度可達 89°。

This paper presents the manufacturing process of through glass via (TGV) structure and direct implications on the design of quartz-based interposer applications for three-dimensional integrated circuit (3D-IC) packaging technology. First, we analyze detailed substrate thickness formed by dry etching with various associated structures based on the use of thin quartz as a substrate material. Then, we evaluated the holes etched in glass wafers by photolithography and inductively coupled plasma-reactive ion etching (ICP-RIE) techniques. The fabricated TGV morphology showed an excellent characterization between substrate thickness, via diameter, and via shape for a vertical interposer. Finally, we obtain that TGV structure with a diameter of 50 μm in 150 μm thin quartz wafer exhibit high usability for thin wafer processing with the optimized fabrication parameters.