影像感測處理晶片已經廣泛地被整合於車用電子、智慧手機、及平版電腦等需要極高運算效能及低功率消耗的行動裝置。相較於傳統的晶片設計技術，許多三維晶片堆疊式技術已經被證明能夠有效地達到這些設計需求與異質晶片整合的替代方案。在最近幾年，新式影像感測器系統晶片已經可以藉由這些先進技術被實作出來。然而，目前業界與學術界尚未有針對此特定應用及晶片的高階系統設計平台去快速地達到系統分析及影像處理軟體開發。因此，針對影像感測處理系統晶片設計，本論文提出數個電子系統層級建模方法及一個虛擬平台去達到這些目標。並且，針對數個影像處理應用，此平台可以達到小於8秒的模擬時間及97.5%的時序正確性。

Image sensor processing chips are widely integrated in mobile devices such as automobiles, smartphones and tablets which demand extremely high performance and low power consumption. Compared with conventional chip design techniques, a range of three -dimensional stacking technologies have been shown as efficient alternatives to satisfy these design requirements and to enable heterogeneous integration. In recent years, new image sensor system chips have been implemented with these advanced technologies. However, for such sensor processing applications and chips, no corresponding high -level system design platform for rapid system analysis and software development is used in academia and industry. Therefore, this paper proposes several ESL modeling methods and a virtual platform for the design of image sensor processing system chips to achieve these objectives. Moreover, for several image processing applications, this platform has simulation time of less than 8 seconds and timing accuracy of 97.5%.