Software defined radio is increasingly important due to its flexibility to integrate a variety of communication standards and efficiency to develop or verify system architectures and algorithms. But the biggest problem of SDR is its large amounts of data and computing, resulting in unable to complete instant signal processing. Here we provide the hardware acceleration IP in FPGA to speed up the routine computing like filter or FFT. Meanwhile, due to the different needs of different frequency bands needs different RF modules in the past, we can now use an ultra high-speed ADC to access and down convert data by digital RF technology. In this paper, we develop the joint timing and frequency synchronization technique by Matlab to replace lots of analog components and IC works. Finally, we proposed an algorithm to overcome the channel effect in high speed vehicular environment. This SDR system with high-speed ADC and FPGA could verify idea flexibility and provide the fast time-to-market opportunities.