本論文描述一應用於WiMAX接收機的前端電路，並設計與實現於90奈米CMOS製程技術。此前端電路可操作在2.3GHz至2.7GHz頻率範圍。工作元件包含單端轉差動的低雜訊放大器、解調器、除二電路、輸出緩衝器。其中低雜訊放大器具有可變增益控制結構，可依輸入訊號功率大小調整增益模式設定，避免因電路線性度不足而造成的訊號失真，以符合系統線性度要求。解調器是採用電流式架構，包含轉導放大器、被動混波器、轉阻放大器，來避免因電壓轉換所造成的訊號損耗。此接收機前端電路提供4dB至30dB的可調增益範圍，最大增益與雜訊指數分別為30dB與4.5dB。整個晶片在1.2V操作電壓下消耗22mW。

A receiver front-end for WiMAX applications has been designed and fabricated in a 90-nm CMOS process. This front-end circuit consists of a single-to-differential low-noise amplifier (LNA), a demodulator, a
divided-by-2 circuit, and buffers. The LNA has the feature of variable-gain control to the input-signal power in order to match the specific requirement of linearity. This LNA structure could avoid the signal distortion caused by insufficiency of linearity. As to demodulator, it consists of a gm-stage (transconductance amplifier), a passive mixer, and a transimpedance amplifier. This demodulator adopts a current-mode structure to overcome a transfer-power loss resulted from voltage transfer. The receiver front-end covers the frequency range from 2.3GHz to 2.7GHz and provides variable-gain range from 4dB to 30dB. The maximum gain and noise figure of this circuit are 30dB and 4.5dB, respectively. The chip consumes 22mW from a 1.2V power supply.