軟體定義無線電(Software-Defined Radio；SDR) [1][2][3]，多年來一直是通訊界研發的重點之一，其原因為軟體定義無線電可實現各種分歧的無線通訊協定，並且耗費最小的硬體資源。在此篇論文中，除了介紹我們所開發出的IEEE 802.16m的基頻演算法外，亦利用德州儀器(TI)公司所提供的多核心數位訊號處理器與Synopsys公司所生產之可程式化閘陣列(FPGA)構建出一多核心訊號處理平台。在此平台中，我們根據不同的傳送與接接端模組，將IEEE 802.16m的基頻演算法，分別分配到不同的數位訊號處理器作處理。搭配在FPGA端開發的無線射頻模組，實現了下一世代無線通訊系統IEEE 802.16m的傳輸。

In the recent years, Software-Defined Radio (SDR) plays an important role in the radio communication.
Because it accomplish many kinds of communication protocols with the least hardware resources. In this paper, we not only introduce the proposed IEEE 802.16m algorithm but also use multi-core DSP chips
provided from TI and FPGA supported from Synopsys to set up a multi-core DSP SDR platform .According to the transmit or the receive module, we allocate the proposed baseband algorithm to different DSP chips .Attached to the proposed RF module, we realize the IEEE 802.16m algorithm in the next generation radio communication.