傳統RC-based電源軌線間靜電放電箝制電路中以大通道電晶體(BigFET)佈局方式的N型金氧半電晶體作為靜電放電之箝制元件，此箝制元件可有效地增進互補式金氧半(CMOS)積體電路的靜電放電耐受度，本論文利用大通道電晶體的結構特性，提出不需額外電容的新型靜電放電偵測電路架構並驗證於65奈米1.2V製程。與傳統RC-based靜電放電偵測電路架構相較時，新型靜電放電偵測電路的佈局面積可減少超過54%，根據實驗結果，在靜電放電模式下，新型靜電放電偵測電路可維持長時間的導通；而在正常電路操作模式下，亦具有良好的抗誤觸發之能力以及因暫態雜訊干擾所引發的閂鎖效應風險。

The RC-based power-rail ESD clamp circuit with the n-channel metal-oxide-semiconductor (NMOS) transistor drawn in the layout style of big field-effect transistor (BigFET) has been utilized to effectively enhance the ESD robustness of CMOS ICs. In this work, a new ESD-transient detection circuit without using the capacitor has been proposed and verified in a 65nm 1.2V CMOS process. The layout area of the new ESD-transient detection circuit can be greatly reduced by more than 54%, as compared to the traditional RC-based ESD-transient detection circuit realized with capacitor. From the experimental results, the new proposed ESD-transient detection circuit with adjustable holding voltage can achieve long enough turn-on duration under the ESD stress condition, as well as better immunity against mistrigger and transient-induced latch-on event under the fast power-on and transient noise conditions.